1. Field of the Invention
This invention relates to a vertical diode with an N-type layer and a P-type layer stacked therein and a method for manufacturing the same and a semiconductor memory device based on this vertical diode.
2. Background Art
Semiconductor memory devices including memory cells integrated on a semiconductor substrate have been conventionally developed. For instance, as such a semiconductor memory device, JP-A 2008-085071 (Kokai) discloses a ReRAM (Resistance Random Access Memory). The memory device disclosed in JP-A 2008-085071 (Kokai) includes a plurality of word lines extending in a first direction and a plurality of bit lines extending in a second direction. A resistance change element is connected between each word line and each bit line, and the resistance value of this resistance change element is used to store information. In this memory device, a thin-film diode is connected between the word lines and the resistance change element or between the bit lines and the resistance change element so that no current flows in the non-selected word lines and bit lines.
On the other hand, in semiconductor memory devices, memory cells have been downscaled for higher capacity and lower cost. However, in view of the limit of lithography technology, further downscaling may instead lead to cost increase. Hence, recently, stacking memory cells to increase integration density has come under consideration.
In the aforementioned ReRAM, to stack memory cells, the thickness of the thin-film diode needs to be decreased in view of processing issues and the like. However, in the thin-film diode with a small thickness, it is extremely difficult to satisfy both a low forward resistance and a high reverse breakdown voltage.